Sipeed M1 Dock Suit
AI Sipeed M1 Dock Suit is pervasive today, from consumer to enterprise applications. With the explosive growth of connected devices, combined with a demand for privacy/confidentiality, low latency, and bandwidth constraints, AI models trained in the cloud increasingly need to be run at the edge.Sipeed M1 Dock Suit purpose-built module designed to run AI at the edge, we called it AIoT. It delivers high performance in a small physical and power footprint, enabling the deployment of high-accuracy AI at the edge, and the competitive price makes it possible to embed to any IoT devices. As you see, Sipeed MAIX is quite like Google edge TPU, but it act as master controller, not an accelerator like edge TPU, so it is more low cost and low power than AP edge TPU solution.
MAIX CPU
In hardware, MAIX have powerful KPU K210 inside, it offers many exciting features:
- 1st competitive RISC-V chip, also 1st competitive AI chip, newly released in Sep. 2018
- 28nm process, dual-core RISC-V 64bit IMAFDC, on-chip huge 8MB high-speed SRAM (not for XMR :D), 400MHz frequency (able to 800MHz)
- KPU (Neural Network Processor) inside, 64 KPU which is 576bit width, support convolution kernels, any form of activation function. It offers 0.25TOPS@0.3W,400MHz, when overclock to 800MHz, it offers 0.5TOPS. It means you can do object recognition 60fps@VGA
- APU (Audio Processor) inside, support 8mics, up to 192KHz sample rate, hardcore FFT unit inside, easy to make a Mic Array (MAIX offer it too)
- Flexible FPIOA (Field Programmable IO Array), you can map 255 functions to all 48 GPIOs on the chip
- DVP camera and MCU LCD interface, you can connect an DVP camera, run your algorithm, and display on LCD
- Many other accelerators and peripherals: AES Accelerator, SHA256 Accelerator, FFT Accelerator (not APU’s one), OTP, UART, WDT, IIC, SPI, I2S, TIMER, RTC, PWM, etc.
Features of Sipeed M1 Dock Suit:
- 1st competitive RISC-V chip, also 1st competitive AI chip, newly released in Sep. 2018
- 28nm process, dual-core RISC-V 64bit IMAFDC, on-chip huge 8MB high-speed SRAM (not for XMR :D), 400MHz frequency (able to 800MHz)
- Flexible FPIOA (Field Programmable IO Array), you can map 255 functions
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